Description: This package contains a 7-stage binary ripple counter that can also be used as divide-by-128 circuit. The circuit is counts up using positive logic.
Functional Diagram or/and Package:
Pin Names:
Vdd - Positive Supply Voltage [BV to 15V]
Vss - Ground
Q1, Q2, Q3, Q4, Q5, Q8, Q7 - Outputs
CLK - Clock or Input
RST - Reset
N.C. - Not Connected
Truth Table: none
Operation Mode:
RST is held at ground.
The circuit advances one count in the positive transition of the clock signal.
The outputs divide the clock signal by powers of two according the RST is done by putting the pin to the “1 ” logic level [positive].
Electrical Characteristics:
Applications:
Counters
Frequency Dividers
Time Delay Circuits
Observations:
This is a ripple counter. When setting the time, the circuit counts incorrectly.
