Description:
The synchronous counter can be preset and also has an internal carry look-ahead for fast counting and to allow cascading packages Without the need of additional logic.
Functional Diagram and/or Package:
Pin Names:
Vdd - Positive Supply Voltage (3V to '15V]
Vss - Ground
CLK - Clock
CL - Clear
P EN, T EN - Enable Inputs
LD - Load
lNA, lNB, lNC, lND - inputs
QA, QB, QC, QD – Outputs
Operation Mode:
The Clear (CL) function is synchronous. CL=1 sets the outputs to “0”.
Load = 0 disables the counter and causes the output to agree with the setup data after the next clock pulse, regardless of the levels present in EM inputs (P and T).
Counting is enabled When P EN and T EN = 1.
Logic Waveforms:
Electrical Characteristics:
Other Devices:
The 40160, 40161, and 40168 are devices of the same group with only small differences in the operation mode.
Applications:
Programmable Counters
Frequency Dividers
Timers
Observations:
This device is the CMOS equivalent to the TTL 74162
